1. Field of the Invention
The present invention relates to a plasma processing apparatus for processing, e.g., etching or ashing, a coating on a workpiece such as a semiconductor wafer in a plasma.
2. Description of the Relevant Art
FIGS. 6 and 7 of the accompanying drawings show conventional plasma processing apparatus for etching or ashing a coating on a semiconductor wafer in a plasma while minimizing the risk of damaging the semiconductor wafer.
The plasma processing apparatus shown in FIG. 6, which is known as a downstream-type plasma processing apparatus, has a bell-Jar-shaped chamber 100 including an upper smaller-diameter portion on which there is disposed a pair of sheet-like electrodes 101, 102 in confronting relationship to each other. One of the sheet-like electrodes 101, 102 is electrically connected to a high-frequency power supply whereas the other electrode is connected to ground. The plasma processing apparatus also includes a table 103 for placing a semiconductor wafer W thereon, the table 103 being positioned in the lower end of the chamber 100 downwardly of the sheet-like electrodes 101, 102. Since the table 103 is downwardly spaced from a plasma-generating region between the sheet-like electrodes 101, 102, the semiconductor wafer W can be processed mainly with radicals without being affected by charged particles. A plasma is generated mainly in a region where the spacing between the sheet-like electrodes 101, 102 is minimum, and hence is not uniformly produced in all the space between the sheet-like electrodes 101, 102. Therefore, no stable plasma is generated between the sheet-like electrodes 101, 102, resulting in a relatively low etching or ashing rate. The etching or ashing rate may be increased by increasing the high-frequency energy applied by the high-frequency power supply or increasing the degree of a vacuum created in the chamber 100. However, the increased high-frequency energy or degree of a vacuum tends to draw the plasma toward the table 103 or an evacuating port. As a result, the generated plasma is positioned closely to the semiconductor wafer W, with result that the semiconductor wafer W may be charged by charged particles or the density of the plasma becomes irregular over the semiconductor wafer W, adversely affecting the semiconductor wafer W. Adjustments to avoid such a drawback are difficult to make as the above phenomenon differs from apparatus to apparatus.
Another conventional plasma processing apparatus that is similar to the plasma processing apparatus shown in FIG. 6 includes sheet-like electrodes disposed around a tubular chamber and electrically connected to a high-frequency power supply, and a table connected to ground for placing a semiconductor wafer thereon. With this arrangement, since a plasma is generated in a space between the sheet-like electrodes and the table, the generated plasma is liable to impinge directly on the semiconductor wafer on the table, causing damage to the semiconductor wafer.
The plasma processing apparatus shown in FIG. 7 is referred to as a coaxial-type plasma processing apparatus. The plasma processing apparatus includes a tubular chamber 110 surrounded by a tubular sheet-like electrode 111 electrically connected to a high-frequency electrode. A grounded tubular inner electrode 112 in the form of a metal mesh or a punched metal sheet is housed in the tubular chamber 110. A plasma is generated in a space between the sheet-like electrode 111 and the inner electrode 112, with semiconductor wafers W being located radially inwardly of the inner electrode 112. The inner electrode 112 prevents charged particles from the plasma from entering the region where the semiconductor wafers W are located. However, the inner electrode 112 acting as an electrode is incapable of completely blocking charged particles because the plasma is produced very closely to the inner electrode 112. If the high-frequency energy supplied from the high-frequency power supply is increased for an increased etching or ashing rate, then the temperature of the inner electrode 112 is increased. The increased temperature of the inner electrode 112 poses various problems. For example, when a resist with a high dose of ions is to be peeled off a semiconductor wafer, the temperature in the chamber 110 is increased causing a burst before a hard surface layer is peeled off the semiconductor wafer. The increased temperature of the inner electrode 112 results in an increased etching or ashing rate only in a region near the inner electrode 112, failing to process the semiconductor wafer uniformly.